Cypress CY7B9920-2SC

扇出缓冲器（分配），零延迟缓冲是时钟CMOS

Overview

The CY7B991 and CY7B9920-2SC Programmable Skew Clock Buffers (PSCB) offer user selectable control over system clock functions. These multiple output clock drivers provide the system integrator with functions necessary to optimize the timing of high performance computer systems. Each of the eight individual drivers, arranged in four pairs of user controllable outputs, can drive terminated transmission lines with impedances as low as 50Ω. They can deliver minimal and specified output skews and full swing logic levels (CY7B991 TTL or CY7B9920-2SC CMOS).

■ All output pair skew <100 ps typical (250 maximum)■ 3.75 to 80 MHz output operation■ User selectable output functions ❐ Selectable skew to 18 ns ❐ Inverted and non-inverted ❐ Operation at 1⁄2 and 1⁄4 input frequency ❐ Operation at 2x and 4x input frequency (input as low as 3.75 MHz)■ Zero input to output delay■ 50% duty cycle outputs■ Outputs drive 50Ω terminated lines■ Low operating current■ 32-pin PLCC/LCC package■ Jitter < 200 ps peak-to-peak (< 25 ps RMS)

Features

Tube Package
Available in the SOIC
Supply voltage of 5V
Operating supply voltage of 5V

Surface Mount Mounting Type

Applications

There are a lot of Cypress Semiconductor
CY7B9920-2SC Clock Generators applications.

• Wide area power system
• Digital circuits
• Wireless base station for LTE, LTE-advanced
• Picocells, femtocells and small cells
• Sampling clocks for ADC and DAC
• 1 Gigabit Ethernet
• 10 Gigabit Ethernet
• FPGA and processor clocks
• Line cards used in telephone exchange
• Fiber Channel